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Training & LifeLong Learning > Modular Training Programme > Syllabus |
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SYLLABUS
1. Computer Animation and Games Development
| Module |
Topics |
Hrs |
Fees (Rs.) |
| 1.ToonBoom Studio |
- > Toon Boom Studio: Basics, Drawing and Importing Artwork: Starting your Animation, Setting the Frame Rate and Camera Size, Adding, Working with Text, Optimizing Drawing Objects for the Web, Cutting and erasing the Objects, Importing Static Image
- > Inking and Painting and Animating: Coloring Your Character, Inking Line Art, Creating Multiple Palette Style, Animating Elements with Pegs, Using Keyframes and Timeline Properties, Creating animation with Motion Path, Editing Functions Using the Function Editor.
- > Creating Effects, Playback and Rendering: Additive and Multiplicative Color Changes, Clipping Mask Effects, Drop Shadow Effects Preview a Scene Interactively, Real Time Playback, Exporting Your Movie, Exporting Drawings.
|
50Hrs |
Rs.6000.00 |
| 2.Autodesk 3Ds Max |
- > The 3Ds Max Interface: The Menu Bar, Main Tool Bar, The Command Panel, Geometry, Modify Panel, Hierarchy Panel, Utility Panels
- > Modeling with Polygons, NURBS: Modeling Concepts, Polygons, Primitives, Modifier, Edit Polygons, Editable Poly Tools Understanding NURBS, NURBS at Sub-Object Level, NURBS Tool Palette
- > Materials and Mapping: Introduction to Materials, Materials Type, The Material Editor, Mapping Coordinates.
- > Organic Poly Modeling and Biped: Creating the Basic Form, Biped, Bones Creation, Physique, Character Studio, Customizing a Biped, Creating Footstep, Bipeds Motion Dynamics, Freeform and Footstep Animation
- > Lighting and Rendering: Basic Lighting Concepts, 3Ds Max Lights, Common Light Parameters, Creating Shadows, Atmosphere and Effects, Rendering Setup, Motion Blur, Cameras, Safe Frame, Render Element , Render Effects
- > Particle Systems, Space warps and Utility Panel: Introduction to Particle Systems, Types of Particles, Using particle Systems, Introduction to Space Warp, Types of Space warps, Using Space Warps, Dynamics and Reactors, Camera Match, Motion Capture, Level of Details, Max Script
- > Video Post: Introduction to Video Post, Using Video Post tool, Video Post Queue, Adding Scene Events
|
75Hrs |
Rs.10000.00 |
| 3.Autodesk Maya |
- > Modeling: Polygonal, Organic, NURBS, Preparing models for animation
- > Character Setup: Deformers, Joints and skeletons, Skinning, Character controls
- > Animation: Animation Basics, character animation, Animation tools
- > Texturing, Lighting and Rendering: Texture Basics, Painting in Maya, Lights and cameras
- > Particles, emitters and Fields: Particles and fields, advanced particle systems, Rigid and soft body Dynamics, Maya Hair, Maya Cloth
- > Post Production: Rendering for postproduction, Compositing in postproduction
|
75Hrs |
Rs.10000.00 |
| 4.Autodesk MotionBuilder |
- > Introduction to Motion Builder: Motion Builder Menu Bar, Viewer Window, Asset Browser, Navigator Window, Layouts Preferences, Adding an Elements Folder Asset, Saving Importing, Exporting, Batch Processing, Rendering
- > Cameras and Lighting: Camera Basics, Producer Camera, Custom Cameras, Camera Settings, Camera Switcher Global Lights, Custom Lights
- > Surfaces and Shaders: Materials, Textures, Shader Basics, Cartoon Effects, Environment Effect, Reflection Effect, Surface Effects, Shadows and Lighting Effects, Shader Manager
- > Manipulating Objects and Key frame Animation: Transformation, Handles, Degrees of Freedom, Animation Basics, Changing Properties Selecting time, Transport Control, Selecting Takes
- > Animating with Constraint: 3 Points Constraints, Aim Constraints, Chain IK Constraint, Constraints Basics, Path Constraint, Path Animation, Position Constraints, Range Constraints, Relational Constraints, Rigid Body Constraints, Rotation and Scale Constraints
- > Animating With Devices and Animating Character: Device Assets, Motion Builder Devices, Character Basics, Character Setup, Character Assets, Models, Skeletons, Floor Contact, Character Extension, Character Settings, Character Controls
- > Motion Sources and Control Rig: About Motion Sources, Actor Assets, Marker sets, Optical Motion Data, Magnetic Motion Data, Control Rigs, Pinning, Customizing Control rigs Poses
- > Animating Faces and Working with Story Window: Head Modules, Face Workflow, Actor Space Asset, Character Face asset, Voice device Story Window Basics, Story Track Creation, Manipulating Clips, Story Ghosts
|
75Hrs |
Rs.10000.00 |
| 5.Autodesk Combustion |
- > Introduction to Combustion: The Tool Bar, The Work Space, The View Port, 2D/3D Workface, Resolution and time Composite Operator, Paint Operator, Text Operator, Particle Operator, Edit Operator Paint Tool, TV and Film Safe Zone
- > Animation and Motion Graphics: Basic Animation, Animate the Surface Properties, Onion Skinning, Ram Preview, Create text, Drop Shadows, Animate Text on a Path, Text gradient and Opacity
- > Masking ND Particle Effects: Draw Mask, Feather Mask, Paint Object Masks, Animate Particles, Particle Deflectors, Customize Particles, Particle Properties.
- > Cameras and Lights: Camera Option, Animate Cameras, Lighting, Shadows, Soft Shadows, Reflections, Animate Light.
- > Composting and Keying: RPF Export, The Import Queue, Create a simple Composite, The Diamond Keyer, Alpha Channels.
- > Color Correction and 3D Post: Color Correction Tools, Color Correction, Depth of Field, RPF Motion Blur, 3D Fog, 3D Glow.
|
50Hrs |
Rs.7000.00 |
| 6. OpenGL |
>Introduction: Coordinate system, Graphics Pipeline, Translation scaling, Rotation, Reflection and Shear transformations, Combined modeling and Co-ordinate transformation
>Camera and lighting: 3D viewing pipeline, Frustum, Perspective and Orthographic projection, Model view transformation, Aspect ratio
>Geometric modeling: Polygons, Surfaces, Creating object lists, Meshes based on algorithm >Materials and Lighting: Colors to 3D surfaces, Surface properties – Specular, Diffuse, Transparency, Creating light sources, Animating light sources
>Textures: Texture coordinates, Binding textures, Texture parameters, Texture importing, Wrapping to meshes
>Animation: Animating scene objects – lights and primitives
>User Interfacing with OpenGL: User Interfacing using 3rd party GUI library, interfacing with game devices |
50Hrs |
Rs.10000.00 |
| 7. DirectX |
>Introduction: Coordinate system, Display pipeline, Homogeneous coordinates and transformation matrices, Transformations in display pipeline, Orientations
>Camera and lighting: 3D viewing pipeline, World transformation, view transformation, projection transformation, positioning and pointing the camera
>Geometric modeling: Creating vertex and index buffers, Primitive types, Mesh import Materials and Lighting: Colors to 3D surfaces, Surface properties – Specular, Diffuse, Transparency, Creating light sources, Animating light sources
>Textures: Texture coordinates, Binding textures, Texture parameters, Texture importing, Wrapping to meshes Animation: Animating scene objects – lights and primitives
>Interfacing with DirectX: User Interfacing using DirectX input library, Interfacing with game devices |
50Hrs |
Rs.10000.00 |
Other Short-Term Courses
| Module |
Topics |
Hrs |
Fees (Rs.) |
| 3D Modeling & Animation |
Tools : 3Ds Max / Maya + MotionBuilder |
150 Hrs. |
Rs 20000.00 |
2. Embedded System Design
| Module |
Topics |
Hrs |
Fees (Rs.) |
| 1.General Purpose OS |
- > Introduction to Operating Systems: Concept and classification
- > Computer System structures operation, I/O structure, storage structure, storage hierarchy, hardware protection, network structure, system components, System services, system calls, system programs, system structure, virtual machines, system design and implementation
- > Processes: Concept, scheduling, operations on processes, cooperating processes, Interprocess communication Threads- overview, multithreading models, threading issues, pthreads CPU scheduling – Basic concepts, Scheduling criteria, scheduling algorithms, multiple processor scheduling, real time scheduling Process Synchronization – critical section problem, synchronization hardware, semaphores, classic problems of synchronization, critical region, monitors, OS synchronization, atomic transaction Memory management – introduction, swapping, contiguous memory allocation, paging, segmentation, segmentation with paging
- > Virtual memory: concept, demand paging, process creation, page replacement, allocation of frames, thrashing File System Interface and Implementation – File concept, access methods, directory structure, file system mounting, File sharing, Protection, File system structure, File system implementation, directory implementation, allocation methods, Free Space management, efficiency and performance I/O Systems – overview, I/O hardware, application I/O Interface, Kernel I/O subsystem, Transforming I/O to hardware operations
|
20 Hrs. |
Rs.3000.00 |
| 2.Linux Kernel Internals |
- > General Architecture of the kernel, Boot process, Process Management, Creating and destroying process, process scheduling, thread management, Interrupt handling, Memory management, virtual Address space, File system –Principles, Proc & VFS, system calls, IPC’s – signal handling Synchronization in kernel, Locking entire files and file areas, system V IPC.
|
40Hrs |
Rs.6000.00 |
| 3.Embedded Linux |
- > Linux introduction and Generic Architecture of an Embedded Linux systems, Types of Embedded Linux systems, Linux directory Tree concept, Design and implementation Methodology, Host/Target Development setup, and Types of boot Configuration, Architecture Support, Bus and Interface, I/O, Storage (MTD), Types of Boot loaders.
- >Porting Linux over Target using Embeddix or PCS: Tool chain building, building kernel image, creating root file system, binary image formation, deployment over the target.
|
30Hrs |
Rs.5000.00 |
| 4.VxWorks Programming |
- > Real Time Operating System: Overview, RT Multitasking, Semaphores, Inter-Tasking, Events, shared memory objects, Exceptions, Interrupts and Timers, IO systems, File System, Memory Management.
- >Vxworks Programming: Task creation, deletion and task information details. Use of timers and synchronization with time, task lock and unlock, spawning multiple tasks, task syncronization, task scheduling, binary, mutex and counting semaphores, POSIX signal routines, Interrupt services, watchdog timers, message queues and pipes and cross development
|
50Hrs |
Rs.7500.00 |
| 5.C- programming using Linux |
- > Introduction to C language, Constants, Variables and Data types, Operators and Expressions, Control Statements, Console Input and Output statements, Arrays and Strings, Functions, Pointers, Structures and Unions, Enumerated Data Types, File Handling in C, The C Preprocessors, Header Files, Dynamic Memory Allocation.
|
40Hrs |
Rs.3000.00 |
| 6.Data Structure using C |
- > Creation of Stacks and Operations on Stacks, Conversion of expressions from Infix, Postfix and Prefix, Creation of Queues and Operations on Queues, Circular Queue, Priority Queue, Double Ended Queue, Singly Linked List, Circularly Singly Linked List, Doubly Linked List, Circularly Doubly Linked List, Header Node, Tree Traversal, Binary Search Tree, Threaded Binary Tree, Binary Tree Sort, Heap Sort. Hashing techniques and AVL trees.
|
40Hrs |
Rs.4500.00 |
| 7.Network programming using Linux |
- > Overview of data communication and Networking, protocols and standards, OSI model, TCP/IP concepts, Sockets, client and server programming, Inter Process communications, pipes, FIFO’s, semaphores, Advanced sockets
|
30Hrs |
Rs.3500.00 |
| 8.Network programming using VxWorks |
- > Sockets in Vxworks, BSD sockets, Datagarm sockets, stream Sockets, Zbuf Sockets, Remote procedural calls, ULIP, RSH, telnet, TFTP server, configuration of network protocol stack in vxworks, overview of Network Interface Drivers, END drivers, NPT drivers, Vxworks Network Programming: Client and server programming using target systems, UDP and TCP sockets, Zero-buff stream sockets, RPC client and server stubs implementation. Configuring Full Simulator for networking
|
30Hrs |
Rs.4500.00 |
| 9.ARM 7TDMI Processor |
- > Basic Concepts of a processor, Introduction to Assembly language, Introduction to RISC & CISC Architecture, ARM Programmers Model, Processor Modes, Endianness, Instruction Pipelining, ARM Architecture, ARM Processor Organization, ARM Instruction Set, Load Store Instructions, Data Processing Instructions, Branching & Exception, Thumb Instructions, ARM Applications, Programming LED, 7 Segment Display and Dip Switches using Evaluator 7T ARM Core Board. LCD display, RTC , serial communication, ADC using LPC2129
|
40Hrs |
Rs.6000.00 |
| 10.8051 Microcontroller |
- > Introduction to Embedded systems , 8051 microcontroller, Software development using Keil compiler, 8051 assembly programming, Branch instructions, Addressing modes, arithmetic &logical instructions, I/O port programming (led , seven segment, LCD, keypad interfacings), Embedded C programming for 8051, 8051 timers/ counters programming, 8051 serial port programming, interrupt programming, sensor Interfacing(ADC).
|
40Hrs |
Rs.4000.00 |
| 11.PIC Microcontroller |
- > Introduction, Architecture, Basic Registers, Instruction set , Assembly and C programming, I/O port programming, Timer modules, Interrupts, Compare/capture module, PWM module, ADC, USART Communication, Software development using MPLAB, Case studies
|
40Hrs |
Rs.5000.00 |
| 12.68HC12 Microcontroller |
- > Introduction, Features of 68HC12 Microcontroller, Architecture, Registers of CPU12, Addressing modes, Instruction set and Assembly level programming, I/O ports, Timers, Interrupts, PWM module, ADC, serial communication and need of 68HC12 in vehicle networking (Basics of CAN).
|
40Hrs |
Rs.5000.00 |
| 13.Micro-C – II OS |
- > Embedded OS, RTOS, Process concept, scheduling strategies, Real Time Systems, Characteristics of RTOS, Classification of tasks, concept of multitasking, synchronization and inter task communication. MicroC OS – II RTOS, Multitasking, Task state diagram, creating task, deleting task, suspending and resuming task, delaying task. Synchronization, Semaphores, Operations: create, post, pend, accept, query, delete, Waiting for multiple events, Event flags, conjunctive and disjunctive synchronization, operations on event flags, Mutual exclusion problem, race conditions, Mutexes, Operations on mutexes. Inter-task communication, Mailbox, Operations: create, wait, send and receive a message, delete, Message queue, Operations: create, wait, send and receive a message, delete, flush. Issues in porting MicroC OS – II RTOS to PIC microcontroller board.
|
40Hrs |
Rs.5000.00 |
| 14.C++ Programming |
- > Introduction to C++, Variables &, Constants, Expressions & Statements, Functions, Inline Functions, Basic Classes, Constructors & Destructors, Looping Statements, Pointers, Advanced Pointers, this Pointer, References, Advanced Functions, Copy Constructors, Operator Overloading, Arrays, Inheritance, Polymorphism, Overriding Functions, Virtual Functions, The Preprocessors, Templates, Exceptions & Error Handling.
|
40Hrs |
Rs.5000.00 |
| 15.UML Modeling using RRRT |
- > Introduction: SW Engineering Processes, SW Life Cycle, Process Models, Object-oriented Programming: Principles of OOP, concepts of mid-conditions, pre-conditions and post-conditions of methods, class invariants, loop invariants, programming techniques, reasoning & correctness of programs, OO analysis, and OO design
- Programming with Unified Modelling Language (UML) and diagrams: Importance of modeling, Principles of modeling, UML concepts using Rational Rose Real-time tool, Structural modelling, Behavioural modelling, and Architectural modelling,
Diagrams in UML: Use Case diagrams, Class diagrams, Sequence diagrams, Object diagrams, State Chart diagrams, Component diagrams
|
30Hrs |
Rs.4000.00 |
| 16.Blackfin Processor |
- > Introduction to Embedded DSP, Introduction to VDSP++ IDE, Introduction to Blackfin processor (BF-533), Real-Time DSP Implementation considerations, Memory System and Data Transfer, Code Optimization and Power Management Time-Domain Signals and Systems, Frequency-Domain Analysis and Processing, Digital Filtering implementation – FIR and IIR filters, Introduction to Multimedia, Introduction to Audio, Audio Coding and Standards, Image and Video fundamentals
Blackfin BF 533 Processor
|
40Hrs |
Rs.8000.00 |
| 17.TMS Processor |
- > Introduction to DSP Processors, Code Composer Studio (CCS) and DSK, Architectural overview of 67xx, Instruction set of 67xs, EMIF, Linear Assembly, Boot loader, Interfacing C and ASM, Numerical Issues, Interrupts, DSP/BIOS, Software optimization, McBSP, EDMA, Time-domain Signals and Systems, Frequency-Domain Analysis and Processing, Digital Filtering implementation – FIR and IIR filters
TMS320C6713/11 Processor
|
20Hrs |
Rs.3000.00 |
3. Engineering Management
| Module |
Topics |
Hrs |
Fees (Rs.) |
| 1.Project Management |
- > The nature of projects, The nature of Project Management , The project team, Project Organization & Strategy, Financial forecasting, Project appraisal & Sensitivity , Uncertainty & Risk analysis, Managing Organizational Change, Planning, Bar Charts & Networks, Resource scheduling & Expediting, Monitoring & controlling, Estimating, & Budgeting, Budgetary control & Variance analysis, Change Control & Project termination, Contract Process, Contract & Payment Strategy.
‘M.S Project’ software will be taught as part of the module
|
50Hrs |
Rs.6000.00 |
| 2.Process Planning and Scheduling |
- > Company Level Control Systems, (ERP), (MRPII), (MRP)
- > Distributed Control Systems, System requirements, information requirements, monitors
- > Scheduling Techniques, Schedule smoothing, forward/backward scheduling, finite and infinite capacity, push versus pull, constraint theory
- > Local Production Control Techniques, KanBan, Multi-product KanBan, MRP/JIT, Finite Scheduling software (such as PREACTOR), Optimized Production Technology (OPT), Line of Balance, Period Batch Control
- > Impact on the Supply Chain, EDI, user rates, replenishment times, notification period
‘Preactor’ Process Planning Software will be taught as part of the module |
50Hrs |
Rs.6000.00 |
| 3.Manufacturing Simulation |
- > Simulation Life Cycle
- > Discrete event concepts
- > Data Collection - use of the input analyzer
- > Discrete event modeling - Computer based exercises to compliment the above Using “ARENA” software
|
50Hrs |
Rs.6000.00 |
4. MCAD
| Module |
Topics |
Hrs |
Fees (Rs.) |
| 1.CATIA V5 |
Introduction to Geometric modeling and CATIA V5
- > Sketcher: Sketch Tools, Profile creation features, constraining the geometry, Transformations, operations
- > Part Design: Sketch based features, Dress-up features, Surface based features, Transformation features, Parametric Modeling, Boolean operations, Applying material properties, Data Exchanging Formats, Design Table.
- > Assembly Modeling: Top Down Assembly, Bottom-up Assembly, Product structure tools, Manipulation tool, Assembly feature, space analysis, Clash Analysis, Distance and band analysis, sectioning, Accessing Catalog, assembly constraints, Creating bill of material.
- > Drafting: Generative Drafting & Interactive Drafting, Creating the Orthographic views of the components, Dimensioning and adding annotations, Generating Bill Of Materials and Ballooning, Frame creation, Implementation of GD&T symbols.
- > Wire frame & Surface Modeling: Wire frame creation tools, Surface creation tools, Operation on created surfaces like Splitting, Trimming, Joining, healing, Extracting, Extrapolation etc., Transformation features.
- > Generative Shape Design :Advanced Surface Creation, BIW Templates, Development of surfaces and Surface curvature analysis
- > Generative Sheet Metal Design: Sheet Metal parameters, Basic sheet metal operations, Boolean operations
- > Real Time Rendering : Creating Environment, Scene Editor, Animation, Create camera, Apply sticker, Catalogue browser, Create turn table
|
120Hrs |
Rs.10000.00 |
| 2.PRO-E / PRO-E Wildfire |
- > Part Modeling: Introduction, Sketch, Base features, datum features, sections in sketch based features, Edit feature, Engineering features, Construction features, Advanced features, Tweak feature, UDFs & Group, Relation & family Table, Resolving feature failures
- > Pro/Assembly: Creating Assemblies, placing, patterning, packaging, free form Manipulation of components, Top Down Assemblies, Exploded view.
- > Pro/Detail: Drafting basics, creating a Drawing with Model views, Dimensioning & Detailing, Tables & BOM Balloons
- > Pro/SURFACE: Creating a Surface Feature, Trimming Quilts, Flattening & Bending, Creating Solid Geometry using Quilt, Freeform Surfaces, Boundary, Conic surface and N-sided patch
- > Pro/Sheet metal- Sheet Metal Design: Introduction to the Use of the Sheet Metal Design Work Bench for the Creation and Flattening of Sheet Metal Parts, Basic options of sheet metal operations.
|
120Hrs |
Rs.10000.00 |
| 3.UNIGRAPHICS- NX |
Introduction, capabilities and limitations to Unigraphics NX
- > Sketcher: Overview on sketcher, creating sketch, Editing sketch, sketch constraints, sketch operations
- > Part Modeling: Basic features of modeling, Sketch based modeling, Parametric modeling, overview on primitives, Design Form Feature, Detail Feature Operation, Transform features, Associative copy, Boolean operations, Trim operations, Scale/offset, Introduction to sweep, options to sweep, tube creation, Over view on part navigator and best practice.
- > Wire Frame Modeling: Overview on curves and points, Curves based modeling, Editing Curves, Curve Operations from curves and bodies
Free Form Modeling: Surface creation methods, Mesh Surface, Flange Surface, Surface Creation methods through Edit option, Surface, Surface modeling using Hollow, Thicken Sheet methods, Patch
- > Shape Studio: New Styling Task Environment, 3D B-Spline Construction, Styled Sweep, Studio surfaces
- > Assembly: Introduction to assemblies, assembly concepts, creating and editing assemblies, assembly navigator, exercise on creating part and assemblies, Associative Copy, Wave Geometry Linker, reference sets, Working with large assemblies, inter-part modeling, assembly arrangement, function details and best practice.
- > Drafting: Introduction to drafting, Drawing sheets, using views, view dependent edits, using dimensions, export and import options, formatting, preferences, error recovery, , drafting Annotations, drafting Symbols, Utility Symbols, Tabular note and Part list.
- > Additional Drafting: Overview on GD&T symbols and terms, rules and concepts of GD&T, form controls, datum, orientation controls, tolerance of position, concentricity and symmetry controls, run out controls, profile controls -Adding GD&T on drawings.
- > Free form feature: Sheets from points, Making sheets from variable cross sections, Bridging, Offsetting, Filleting & Trimming sheets.
- > Other Features: Overview on File management, Views and customized views, Modeling quick reference menus, grouping features, analysis functions, modeling preferences, importance of datum and datum creation, Visualization, Preference operation.
|
120Hrs |
Rs.10000.00 |
5. Analysis Tools
| Module |
Topics |
Hrs |
Fees (Rs.) |
| 1.NASTRAN / PATRAN |
Introduction to FEA, NASTRAN & PATRAN
- > Pre processing: creating geometries, Finite Element Modeling techniques, Importing the models, Loads and Boundary conditions, Assigning material properties, Field generations, Preparing deck for NASTRAN, Solving using NASTRAN, Deck editing, debugging errors.Post-processing in PATRAN.
- > Problems solving on various domains like Linear & Non-linear Static Structural Analysis, Buckling analysis, Structural Dynamic Analysis, Heat Transfer analysis – Steady & Transient, Composite modeling, Case studies
|
120Hrs |
Rs.10000.00 |
| 2.ANSYS |
- > Introduction to FEA & ANSYS GUI, Basics & general analysis procedure.
- > Pre processing: Creating geometries, Assigning material properties, Finite Element Modeling techniques: Importing the models, Mesh attributes, Free & Mapped Meshing, Check Mesh, Mesh correction, Solving & Post processing
- > Linear static analysis, modal analysis, harmonic analysis, transient analysis, buckling analysis.Nonlinear analysis – contact nonlinearity, residual stress, snap buckling problems.
- > Thermal analysis: Conduction, convection, radiation problems. Case studies. ANSYS parametric design language(Macros)
|
120Hrs |
Rs.10000.00 |
| 3.HYPERMESH |
Introduction to FEM/ Altair Hypermesh
- > Geometry Creation: Geometry Cleanup, Assigning and organizing of components, Simple geometric creation techniques- 1D, 2D and 3D, mid surface creation of structures.
- > 1D Elements: Creation of bars, rods, links, springs, masses etc, line meshing techniques.
- > 2D elements: Types of 2D elements, 2D mapped meshing techniques.
- > 3D elements: Tet mesh, Hex meshing techniques.Applying the BC’s and loads, Preparation of deck for post processing.
|
100Hrs |
Rs.8000.00 |
| 4.FLUENT & GAM BIT (CFD Tools) |
- > Introduction to CFD Analysis & GAMBIT Software : 2d and 3d Geometry Creation, Geometry Transformation & clean-up, Real and Virtual Geometry Concept, Meshing in GAMBIT: Line mesh, face mesh, Volume mesh, Groups of volume mesh, Boundary layer mesh, Examining mesh for Element Quality parameters, Boundary Zone representation and Fluid Continuum Definition, Exercises on geometric modeling creation and meshing of complex geometries.
- > Introduction to FLUENT: Solver Basics, Defining Boundary Conditions, Grid Adoption Technique, Grid Refinement, Problem solving techniques in FLUENT, Animation of results, Post processing procedure
- > Simple Fluid Dynamics Problems : Flow through Venturimeter and Orifice meters, Hydrodynamic Lubrication, External Aerodynamics: Flow around Different geometric shapes, Turbulence models in FLUENT, Compressible flow around Airfoil with pressure far field boundary condition, Case study of 3-D External aerodynamic analysis on car model and evaluation of Aerodynamic performance
- > Heat-Transfer Analysis: Convective Heat Transfer in a Cross-flow Heat exchanger using periodic symmetry Boundary condition, Turbulent Heat transfer in a pipe elbow, Conductive & convective Heat transfer and electronic cooling of Computer cabinet , Radiative heat transfer using various Radiation models
- > Multiphase models: Multiphase models using VOF approach, Eulerian and Lagrangian approaches
- > Turbo machinery problems: Single rotating Reference frame, Multiple rotating reference Frame using Air Blower, Rotor-Stator Interface using Sliding mesh analogy for Steam Turbine, Single stage axial flow Turbo-machine using Mixing plane method, Basic turbo model-unstructured Geo-mesh technique, Low –speed centrifugal compressor, Case study of Mixed flow pump impeller
|
120Hrs |
Rs.15000.00 |
| 5.LS-DYNA |
- > Fundamentals of LS-Dyna, Basic theory related to LS-Dyna, Capabilities of LS-Dyna, preprocessing using Hyper mesh, Basic Structure (Deck), Deck creation for different impact, Input Formats, Commonly Used Keywords, Commonly used material Models, Commonly used contact algorithms, Loads & Boundary Conditions, Explicit, Implicit problems & Case studies
|
120Hrs |
Rs.15000.00 |
| 6.ADAMS |
- > Introduction to kinematics theory, Introduction to Adams View, GUI, Geometry creation, Basic problems of kinematic & Dynamics Simulation, Flexible body simulation, Introduction to ADAMS/CAR, modifying templates, changing Hard points, Full vehicle Analysis, Introduction to plug-in for Adams.
|
120Hrs |
Rs.12500.00 |
| 7.LMS VIRTUAL LAB |
- > Introduction to LMS VIRTUAL LAB, Generation of Cavity Mesh, Mesh Coarsening, BEM mesh for Acoustics application, FEM Acoustics, BEM Acoustics, exercise on these modules.
|
120Hrs |
Rs.15000.00 |
| 8.PAM Safe |
- > Learn to use, through practical applications and theory, the different options of PAM-SAFE software to simulate the effect of restraint systems (such as seatbelts and airbags) and occupants in a crashed vehicle.
|
80Hrs |
Rs.12000.00 |
| 9.PAM Crash |
- > Learn to perform basic non linear dynamic impact simulations using PAMCRASH -2G, Prerequisites: Basic knowledge of the Finite Element method
|
80Hrs |
Rs.12000.00 |
| 10.ABAQUS CAE/STANDARD & EXPLICIT |
- > Introduction to ABAQUS CAE/STANDARD & EXPLICITPreprocessing : Geometry & meshing Linear & Non linear static, transient Dynamic Analysis using implicit & Explicit solvers Post processing, Exercises.
|
120Hrs |
Rs.15000.00 |
| 11.RICARDO WAVE / VECTIS |
- > Introduction to Ricardo Wave, Basic Engine modeling, Building SI engine model, Building CI engine model Introduction to Ricardo VECTIS, Simple Pipe Junction Tutorial, Steady State Port Flow Tutorial, Spark Ignition Premixed Combustion Tutorial, High Speed Direct Injection Diesel Combustion Tutorial, Moving Boundary In-cylinder Analysis with Fuel Spray Tutorial
|
80Hrs |
Rs.12000.00 |
| 12.FE-SAFE |
Introduction to FE-SAFE, fatigue analysis interface product for ANSYS 11.0.
- > An introduction to modern theories of metal fatigue: Their practical application through worked examples and interaction/discussion.
- > Signal generation: Fully reversed load, Histograms, White noise
- > Load and time history: Scale and combine loading
- > Stress life, strain life: Uniaxial, Bi-axial and multiaxial fatigue, Good men, Soderberg, Von-Mises etc.
|
60Hrs |
Rs.10000.00 |
| 13.MIMICS |
- > Introduction to MIMICS, capabilities & Applications. This standard tool capable of processing and editing CT & MRI scan data, helps to generate 3D geometrical model. Used extensively in medical applications
|
30Hrs |
Rs.6000.00 |
| 14.Easy Crash Dyna (ECD) |
- > Introduction to EASi-CRASH DYNA pre- and post-processing for LS-DYNA, including modeling, material definition, and results analysis.
Prerequisites: Basic knowledge of LS-DYNA
|
60Hrs |
Rs.10000.00 |
| 15.Visual Mesh |
- > Introduction to Visual-Mesh & capabilities , meshing tool which supports CAD import, geometry creation, geometry clean up , 1D, 2D and 3D meshing and editing features.
|
60Hrs |
Rs.6000.00 |
| 16.TEAM CENTER ENGINEERING |
- > PDM: Overview of PDM, Benefits, Process Management and Concurrent Engineering.
- > Team Center: Exploring the Environment, Items, Datasets, Product structure editor, Groups and users
- > Process Management using Team center: Work flow management.
|
30Hrs |
Rs.5000.00 |
| 17.Special Package |
- > Short Term – MCAD Any one modeling software (CATIA / IDEAS / UG / PRO-E) + Any one analysis software (ANSYS / NASTRAN) + Hypermesh
|
120Hrs |
Rs.10000.00 |
6. Product Design Center
| Module |
Topics |
Hrs |
Fees (Rs.) |
| 1.Alias Studio Tool |
- > Concept sketching and coloring with Digital tablet – Wacom – Intues2, Basics of Alias, Alias Auto-Studio, Fundamentals of modeling, Surface Modeling, Surface continuity, Class A surface modeling, realistic Rendering etc.
|
150Hrs |
Rs.18000.00 |
| 2.CorelDraw |
- > Basics of CorelDraw, Page layout design, Brochure design, 3D Effects, Publishing
|
40Hrs |
Rs.5000.00 |
| 3.Manual Sketching |
- > Free Hand Practice Sketching, Shading, Perspective, Outdoor Sketching, Color, Rendering,
Dry Pastel/Charcoal/Watercolors/Color pencils
|
100Hrs |
Rs.5000.00 |
| 4.Model Making |
- > Basic Mock up Model making techniques and materials such as plastic, card board, POP, wood ,etc. Exploration and Vacuum Forming for model making (Note: Cost of material to be borne by delegate for practice)
|
40Hrs |
Rs.5000.00 |
| 5.Clay Modeling |
- > Scaled automotive models, portraits [bust], 2D&3D models and relief model making using clay (Cost of material to be borne by delegate for practice)
|
40Hrs |
Rs.7000.00 |
7. Signal Processing and Communication Technologies
| Module |
Topics |
Hrs |
Fees (Rs.) |
| 1.Matlab & Simulink |
- > Programming Environment: MATLAB Windows, A First Program, Expressions, Constants, Variables and assignment statement, Arrays
- > Graph Plots: Basic plotting, Built in functions, Generating waveforms, Sound replay, load and save
- > Procedures and Functions: Arguments and return values, M-files, Formatted console input-output, String handling
- > Control Statements: Conditional statements: If, Else, Else if, Repetition statements: While, For
- > Manipulating Text: Writing to a text file, Reading from a text file, Randomising and sorting a list, Searching a list
- > GUI Programming Tools: MATLAB
|
30Hrs |
Rs.4000.00 |
| 2.DSP Algorithms and Architectures |
- > Introduction: Digital Signal Processing (DSP) and DSP systems, DSP applications, DSP algorithms and their structure – Regular memory access, high throughput requirements, need for high precision and dynamic range, limited executable size and data memory size, DSP processors and need for DSP processors, TMS320C6000 family architecture, Numeric Representations and Arithmetic: Numeric representation and arithmetic for high precision and dynamic range, Fixed-point vs. floating-point, Native data word width, Extended precision, Data Path: Fixed-point and floating-point data paths, Signal Scaling: Dynamic range estimation, Scale transform, Data Dependency: Data dependency in DSP algorithms, Data Dependency Graphs (DDGs), Utility of DDGs for DSP algorithms, Memory Architectures, Addressing modes, Instruction Sets, Pipelining, Looping and Branching, Interrupts and Exceptions, Peripherals: Serial ports, Parallel ports, GPIO, Host ports, Communications ports, SERDES, Timers, External interrupts, DMA, External memory interface, Code optimization: Code profiling, User and compiler optimisation, Use of DDG for code optimisation, Loop transformations (unrolling, swapping, tiling), On-Chip Debugging, Power Management, Software Development Environment: Introduction, Software Development Tools: Compiler,
Assembler, Linker, DSK
- > Tools: C, MATLAB, Code Composer Studio, TMS32067xx DSK
|
50Hrs |
Rs.7500.00 |
| 3.Fiber Optic Networks |
- > Introduction to Fibre Optics: Why Fibre Optic Communication?, Concept of Modes, Types of Fibres-SMF, MMF, Different types of Losses-Radiation, Scattering, Micro-bending Loss, Concept of Dispersion-Modal, Material, Wave-guide Dispersion, Types of Single mode fibres Overview of Communication: Laser & Detectors, Multiplexing techniques- TDM & FDM, Primary & Higher order multiplexing, Optical Transmission link , Synchronous and Asynchronous systems: Requirement of synchronous systems, Typical Example of SDH system (STM-1, STM-4, STM-16, STM-64) with reference to the product, Configuration of SONET & SDH equipment
- > Alarms & Synchronization: Concept of DWDM & its Fundamentals, WDM, CWDM, DWDM, Systems for DWDM Networks, Elements of WDM Link, Regenerator, Optical, DWDM Network Design, Advances in DWDM Networking, Technologies to achieve High Speed TDM+WDM latest Experiments in DWDM Standards for DWDM ITU-T
Laboratory: OFC Training Modules, METROWAND 3.2
|
50Hrs |
Rs.7500.00 |
| 4.Wireless Networks |
- > Wireless PANs: Bluetooth, Zigbee, UWB and IrDA networks.
- > Wireless LANs: 802.11 a,b,g,n networks. Physical layer concepts. Frame formats, MIMO-OFDM, WLAN Implementation.
- > Mobile IP: Goals and requirements, IP packet delivery, Registration, Tunnelling and encapsulation, Reverse Tunnelling, Mobile IPv6
Mobile Ad Hoc Network: Technologies and Protocols
- > WiMAX: Technology, Benefits and challenges, WiMAX Vs LTE
- > Laboratory: Qualnet, WLAN installation, Programming using “C”, MATLAB & Simulink
|
50Hrs |
Rs.7500.00 |
| 5.Networks and Protocols |
- > Overview of Data communication and Networking: Data communications, Networks, The Internet, Protocols and Standards, Internet Model (TCP/IP) Overview of OSI Reference model Layers of OSI Reference, Understanding TCP/IP Protocol Suite LAN, WAN, MAN.
- > Protocols: IP layer functions, IP v 4 header construct, IP v 4 header fields and functions, IP addressing concepts. Class A, B, C, D IP addresses, Classless Inter domain routing, IP v 6 overview, concept of Layer 2 and Layer 3 addresses, TCP Layer functions, TCP header construct, TCP header fields and functions, UDP overview, Host to host communications on LAN and WAN, Gateway (routing) concept, FTP, SMTP, SNMP, SIP, packet, MAC address and network addresses and their function.Routing protocols, Socket Programming
- > Network Devices: Switches, Routers, Hubs, Repeaters.
- > Laboratory: Programming using “C”, Qualnet, Linux
|
40Hrs |
Rs.5000.00 |
| 6.Digital Image Processing Using MATLAB |
- >Introduction to Digital image Processing, fundamentals of digital image representation, Human Visual system. Image acquisition and image sensors.
- > Image Enhancement: Image transformation and spatial filtering. Intensity transformation, histogram processing and function plotting and spatial filtering.Frequency domain processing, 2-D Discrete Fourier transform, computing and visualizing the 2-d DFT in MATLAB. Filtering in frequency domain.
- > Image Restoration: Different Noise models and different restoration methods. Colour image processing: colour image representation, basics of colour image processing, colour transformations and spatial filtering of colour images.
- > Image Segmentation: Point, line and edge detection. Line detection using Hough transforms. Threshold and region-based segmentation. Segmentation using watershed transforms.
- > Image Compression: Fundamentals of Wavelets, wavelet transform, use of wavelets in image processing. Lossy and lossless image compression. Entropy coding, JPEG and JPEG2000 standards.
- > Tools: MATLAB
|
40Hrs |
Rs.5000.00 |
| 7.DSP with MATLAB |
- > Foundation: Time and frequency domain representation; Analog signal processing; Sampling and digitization; Over sampling and under sampling; Quantization noise; Difference equation; classification of systems; Interpolation and decimation; Fourier transform; Z transform; DFT
- > Fast Fourier Transform: FFT algorithm; Implementation; Application to digital filtering and spectral analysis; Spectral leakage and frequency resolution limitations; Picket fence error; Discrete cosine transform
- > Filter design techniques: IIR filter design using Butterworth, Chebyshev and elliptic design; Bilinear transformation; FIR design using windows; Frequency sampling design; Design by optimization; Half band and Multiband FIR; Hilbert transformer; Raised cosine filter finite word length, precision and stability analysis.
- > Tool: MATLAB, Simulink
|
50Hrs |
Rs.6000.00 |
| 8.Antenna and Microwave Engineering |
- > Introduction to Microwave engineering: Introduction to RF engineering and applications, Various frequency bands; Transmission line theory: open, short and terminated transmission lines: reflection coefficient, VSWR and return loss. Smith Chart. Transmission line types: coaxial, co-planar wave guide, strip-line and micro-strip. Modes of propagation in rectangular and circular Waveguides, cut off frequency of wave guide modes.
- > Multiport Networks: Characterization of Multiport Networks, Impedance and admittance matrices, ABCD & S- matrices, Relationship between Z and S-parameters. Measurement of S-parameters. Impedance matching techniques
- > Introduction to Microwave antennas: Definition of antenna parameters, classification of antennas ,Feeding techniques of simple Antennas ,Near-field and far-field, radiation patterns of antennas,Analysis of antennas: Methods for analysis of antennas and Computational electromagnetic. Measurement Techniques in antenna Engineering: Radiation pattern, radiation efficiency, impedance and S-Parameter
- > Microwave link engineering: Introduction, Friis transmission formula, LOS requirements-Fresnel clearance, Fade margin, Link availability, and Link budget calculation for Satellite links
- > Laboratory: Empire-3D
|
|
|
| 9.Passive & Active Filter Design |
- > Passive Filters: Fundamentals of filter design and basic classification, Performance characterization of filter, Various techniques for the design of filters (including Image parameters or constant K filters), m-Derived Filters, Application of ABCD matrix and scattering matrix in frequency response analysis of filter design, Concept of first order low pass filter design and its importance to derive high pass, band pass and band stop filters, impendence and frequency transformation in filter design. Design of Butterworth and Chebyshev filters. Filter implementation techniques using Microstrip transmission lines. Utility of Richards’s transformation and Kuroda identity.
- > Active Filters: Design of filters using Op-Amps. Principles and design of IIR and FIR Filters
- > Laboratory: Empire-3D
|
40Hrs |
Rs.5000.00 |
8. VLSI System Design
| Module |
Topics |
Hrs |
Fees (Rs.) |
| 1.Integrated Circuit Analysis and Design |
- > Semiconductor device physics: Introduction, concepts of basic semiconductors, operation of diode and its terminal characteristics, analysis of diodes, physical structure and operation of BJT, characteristics of BJT, small signal models and second order effects. Case study.
- > MOS transistor theory: Introduction, structure, operation of enhancement and depletion type MOS transistor, current-voltage characterization of MOS transistor, biasing of MOS transistor, small signal model of MOS transistor, second order effect- body effect, channel length modulation, subthreshold effect, hot electron effect, tunnelling, punch through. MOS transistor capacitances, model parameters, different level of MOS model equations, modelling of MOS transistors using SPICE and scaling of MOS transistors. Case study of modelling MOS devices and extracting model parameters.
- > CMOS inverter design: Introduction, types MOS inverter, resistive load inverter, depletion load inverter, CMOS inverter, design of CMOS inverter, DC (static) characteristic analysis - voltage transfer characteristic and noise margin. Transient (dynamic) analysis - propagation delay, rise time and fall time calculation. CMOS inverter static and dynamic power, CMOS inverter load capacitance and interconnection parasitic. Case study of CMOS inverter design for noise margin, speed, power and timing
- > Combinational and sequential CMOS logic circuits: Introduction, CMOS logic circuits, complex logic circuits, clocked CMOS logic, pass transistor logic, CMOS transmission gates, problems of charge sharing, precharging techniques. Behaviour of bistable elements, timing metrics, SR latch and flip-flop circuits, mux based latches, clocked latch and flip-flop circuit. Case study of combinational and sequential circuits for timing, area and power
- > Logical effort: Introduction, transistor sizing, delays in CMOS logic gates, fan-in and fan-out consideration, fast complex gate techniques, computing of logical effort, path and branch effort, multistage delay and best stage effort. Case study of CMOS circuit design using logical effort.
- > Memory design : Introduction, need for memories, classification of memories, Dynamic Random Access Memory (DRAM) and Static Random Access Memory (SRAM), memory architectures, 6T SRAM memory cell architecture, peripheral memory circuitry - sense amplifier, read/write circuitry, bit line precharge circuitry, row and column decoders and memory timing.
- > Data path subsystem: Introduction, arithmetic logic circuits, classification of adders, design of mirror adder, ripple carry adder, Manchester carry chain adder, carry skip adder, comparison of adders, multipliers and shifters. Case studies of data path subsystems.
- > Low Power CMOS design: Introduction, power dissipation, static and dynamic power dissipation, techniques for reduction of power dissipation, low power design through voltage scaling, estimation and optimization of switching activity, reduction of switched capacitance. Case study of optimizing power in CMOS circuits.
- > Tools used: Synopsys HSPICE, Cadence Virtuoso, Nanosim, Cadence Pspice, LTspice, Microwind, HSIM
|
80Hrs |
Rs.12000.00 |
| 2.Full Custom Physical Design |
- > Full custom physical design: Introduction, challenges and opportunities, nanometre designs, design flow, libraries, technology files, tool set up, industry practices and CAD tools. VLSI fabrication process and DSM/UDSM. Case study.
- > Layout introduction: Introduction, MOS transistor layers, varies design styles, stick diagram, symbolic diagram, design rules-lambda and micron rules 180nm, 90nm, 65nm, 45nm. Layout and physical verification, type’s full custom layout - data path layout, custom digital layout, cell layout and analog layout. Case study.
- > Digital layout design: Introduction, guide line of transistor layout, pMOS and nMOS transistor layout, CMOS transistor layout, sharing diffusion methods, optimization of schematic diagram using dual graph methods and Euler’s path. Combinational and sequential circuit layout, guard ring protection for digital circuits. Case study.
- > Analog MOS circuits: Introduction, MOS Device characterization, CMOS current mirrors, single stage amplifier – common source amplifier, common drain amplifier and common gate amplifier. Design of differential amplifier and two stages CMOS Opamp. Design of resistors, capacitors and inductors. Case study.
- > Analog layout design: Introduction, analog layout techniques, multi finger, interdigitization, axis of symmetry, common centroid, centroid of array, matched device technique, dummy devices on surrounding. Passive component layout - capacitor, resistor and inductor. Case study.
- > Mixed signal layout issues: Introduction, floor planning of analog and digital components, power supply and ground pin issues, matching, shielding, interconnection issues. Case study
- > Standard cell layout: Introduction, classification of STD cell, standard cell design consideration, cell setting, STD cell layout template creation. STD cell Performance for varies process corners, Case study
- > Reliability issues: Introduction, electro migration, electro migration reduction techniques, cross talk, effects of cross talk, IR drop, antenna effect, hot electron effect, latch up problem and latch up prevention. Case study
- > Nanometer design issues and Layout: Introduction, mask error, optical proximities correction, phase shift masking, resolution enhancement technique, gate oxide integrity, metal erosion and metal over etching. Case study.
- > Tools used: Synopsys HSPICE , Cadence Virtuoso, MATLAB, NanoSim, HSIM
|
80Hrs |
Rs.12000.00 |
| 3.Field Reconfigurable Hardware Systems |
- > Introduction: Introduction to VLSI systems, Introduction to reconfigurable systems, Need for reconfigurable systems, Introduction to design flow, Two competing implementation - ASIC & FPGA , Major FPGA vendors, The reconfigurable marketplace, PLD market share, Std Cell ASIC Development Cost Trend, Today’s typical design, Importance of reconfigurable systems in VLSI design, Application for reconfigurable systems, Future of reconfigurable systems, Introduction to FPGAs, Need of FPGAs in DSP Applications, DSP Processors vs. FPGAs, Product Roadmap, Review of PLA, PAL, Introduction to PLDs, Concept of CLB, Interconnect structure, ROM, PROM, Introduction to FPGA, FPGA vendors, FPGA structures
- > RTL Coding for Synthesis: Introduction to RTL coding, Introduction to synthesis, Rules for combinational circuit’s synthesis, Avoiding unwanted latches, Rules for sequential circuit’s synthesis, Position dependent code, Resource sharing,, case, casex, casez etc.., Synthesizable and non synthesizable constructs, Case study – UART
- > Advanced Digital Design: Multipliers, Booth encoding scheme, Wallace tree, FIFO modelling, Finite state machines, FSM modelling in Verilog, Functions and Tasks, UDPs, Case study – FIFO
- > FPGA Architectures: XILINX FPGA Architectures, Anti-fuse and SRAMS, Logic elements and Look-up Tables, Dedicated multipliers, Reconfigurability, Distributed RAM, Shift registers, Digital Clock Managers, Macros, Spartan III and Virtex Architectures
- > FPGA Implementation: FPGA programming, Translate, Map, Floorplan, Place and Route, Post map and Post P&R simulation, UCF constraints, Manual mapping and placement, Reading and analysing reports-post synthesis, Post map simulation, Post P&R simulation, Configuring FPGAs, FSM Extraction, Case study - Dual elevator controller
- > Constraints: Timing analysis, Area Constraints, Slack calculation, Data loss due to large skew, Maximum skew calculations with examples, Period constraints, OFFSET IN, OFFSET OUT Constraints, Multi cycle path, Timing constraints priority
- > FPGA Debugging and Advanced FPGA: Introduction to FPGA Debugging, Debugging using chip scope, Dual edge triggered FFs, Clock domains, Reset circuits, IP cores
- > Tools Used: Xilinx ISE, ModelSim, ChipScopePro, System Generator
|
80Hrs |
Rs.12000.00 |
| 4.Reliable Power Aware ASICs |
- > Introduction to semi custom design flow: Introduction to semi-custom ASIC design flow, Challenges and opportunities, Need for semi-custom ASICS, Scope of semi-custom ASICs, Industry Trends, Market reach and market share of semi-custom ASICs in VLSI (Very Large Scale Integrated Circuit) Industry, Overview of industry standard tools, Salient features of semi-custom ASICs, Levels of abstraction in VLSI designs, and Semi-custom oriented HDL coding
- > Standard Cell Libraries for DSM: Different kinds of libraries and their relevance, Operating conditions, Wire-load models, Timing models, Timing arcs, Kinds of standard cells at 130nm, Cell attributes, Footprints, Naming conventions
- > Timing Analysis in Digital Designs: Terminologies in timing analysis, Various kinds of timing paths, Properties of clock, Clock skew, Timing window and timing violations, Remedies for timing violations, Concept of slack, Critical path, Equations for timing calculations, Solving complex timing problems
- > Synthesis and Constraints: Synthesis requirements, Synthesis process, Pareto points, Realization of constraints from specifications, Classes and significance of constraints, Environmental & optimization constraints, Design rule constraints, Timing and power constraints, Point-point exceptions, Chip level constraints, Case study - Complex sequential designs e.g., Systolic Array Multiplier
- > Optimization & Low Power Techniques: Two level Optimization, Multi-Level optimization, Scheduling and allocation algorithms, Design abstraction levels, Representation domains, Control flow graph, Data flow graph, High level transformations, Low power techniques, Dynamic and leakage power optimization, Multi-VDD, Multi VTH, Retention registers, Top-down and bottom-up synthesis, Characterizing and propagating the constraints, Register pipelining, Multi-Cycle paths, Case study - Communication block e.g., QAM
- > Introduction to VLSI Testing: Need for testing, Importance of testing, Role of testing, Trends in testing, Test cost estimates, DFT cycle, Basic definitions like defect, fault and error, Testing at different levels, Difficulties and challenges of VLSI testing, VLSI chip yield, Fault coverage and defect level, Discussion of reliability issues, Basics of DFM
- > Fault Modelling & Fault Simulation: Importance of fault modelling, Single stuck at fault, Multiple stuck at faults, Bridging faults, Pattern sensitive faults, Transistor faults, Cross point fault, Delay fault, Test and test set, Fault collapsing, Fault simulation concepts, Fault simulation approaches
- > Design For Testability (DFT): DFT Introduction, Controllability, Observability, Need for DFT, DFT techniques, Adhoc DFT, Structured DFT, Scan based design, Scan flip-flop, Different scan types, Scan design rules, RTL for DFT, Test mode vs. Scan mode, DFT DRC rules, Scan clock skew, Multiple test insertion, Adding scan structure, Scan overheads, Testing scan registers - Case study Asynchronous FIFO/ NCO
- > Static Timing Analysis (STA): Necessity of STA, Advanced timing analysis, Recovery time, Removal time, Importance and consequence of timing exceptions, False paths, Directed acyclic graphs, Bottleneck analysis, Case analysis, Mode analysis, Path groups, DFT aware timing schemes, Timing analysis of low power designs, On-Chip variation - Case study QAM / NCO
- > Built In Self Test (BIST): BIST Architecture, Pseudo-Random generators, Signature analysis, Liner Feedback Shift Registers (LFSR) as pattern generators, LFSR as signature analyzers, Built In Logic Block Observers (BILBO)
- > SYNOPSYS: Design Compiler, PrimeTime, Formality, DFT Compiler
- > CADENCE: RTL Compiler
|
80Hrs |
Rs.12000.00 |
| 5.IC Planning and Implementation |
- > Introduction: Introduction to semi-custom ASIC flow, need and importance of physical design flow, overview of EDA tools for semi-custom IC design flow
- > Data Preparation process: Introduction to data preparation functions performing essential tasks for cell libraries which includes creating cell libraries, importing cell data, translating and loading CLF timing data, specifying technology information, power and ground port types, optimizing the standard cell layout, extracting pin and blockage information, setting place and route boundaries and define wire tracks
- > Chip input and output pads: Introduction to IO cells, types of analog and digital IO cells available in library physical specification of a standard IO cell, IO power and ground rail structure arrangement for regular and high tolerant IO cells , types of bond pad structures in the IO cell, simultaneous switching noise (SSN), Simultaneous switching output (SSO), driving index (DI) and factor (DF), concept and types of IO packaging, Flip chip IO cell and EM enhancement
- > Floorplanning and implementation: Introduction to floor planning, differentiating between core limited and pad limited design flow, TDF/IO constraint files, defining best aspect ratio, core utilization, chip utilization, flat and hierarchical design flow, partitioning based on timing and interconnects information for hard macros, creating a physical layout.
- > Power Planning and Management: Need for power management, core and IO level power estimation, limitation of core level and IO level power, top to bottom, bottom up approaches, estimating power budget for flattened and hierarchical designs, placement of power mesh (rectangular rings, straps, trunks) and power pads based on IR and EM based criteria
- > Setup and Analyze Design Timing: Checking design data, loading timing constraints, setting up the environments for library, delay model, parasitics, optimizations, clock and net transition, maximum capacitance constraints on clock domains, TLU+ capacitance and resistance model, analyzing and probe timing paths
- > Placement and optimization: Introduction to placement, standard cell and macro/DEF placement, timing driven and taming the congestion, detaching scan chains, location constraints, high fan-out net synthesis, placement optimization tasks, power optimization, area recovery
- > Clock Tree Synthesis (CTS): Introduction to CTS, physics of CTS, algorithms for CTS, single and distributed driver scheme, path length and its delay models for skew analysis, balanced clock tree, buffer insertion, constraints and device sizing under process variation in CTS, clock distribution network, low skew and power based global, local and useful skew analysis and optimization methodologies.
- > Routing and Optimization techniques: Taxonomy of routing, routing algorithms, channel and switch box routing, balanced, and H tree clock routing, routing operations and optimization, density driven routing, post route optimization for timing, performing design finishing processes, optimizing yield, interactively cleaning up routing DRC, LVS check and errors, antenna checking and fixing violations, crosstalk prevention, analysis and fixing
- > Design Signoff: Introduction to design signoff, data preparation flow for power sign off, checking Physical and logical connectivity power information, preparing data for hard/soft macro extracting PG parasitics, performing power and rail analysis based on IR and EM criteria, performing design rule checking and connectivity verification, generating output for back annotation, performing various ECO analysis, industry standard GDII generation
- > SYNOPSYS: Astro, Formality, PrimeTime, StarRC-XT, Jupiter XT, Hercules, IC Compiler
- > CADENCE: SOC Encounter, First Encounter, FMS, Nanoroute, Voltage storm, Celtic IC
|
80Hrs |
Rs.12000.00 |
| 6.Full Chip Functional Verification |
- > Introduction to design verification: Need for verification, verification process, challenges in verification, cost involved, time involved, verification methodologies and techniques, mission and goals of verification, verification plans, verification flow, verification guidelines, HDL, HVL, HDVL, System Verilog for design and verification, verification methodology manual, industry standard verification tools, Low power verification techniques.
- > Introduction to System Verilog: System Verilog enhancements to Verilog 2001, Generations of System Verilog standard and enhancements for hardware design, System Verilog dot name and dot star enhancements, Case study on instantiation example for complex ALU.
- > System Verilog verification features: Built- in data types, new data types and operators, user defined types, enumerated data types, System Verilog 2 state and 4 state data types, static and automatic variables, verification advantages of 2 state date types, synthesis guidelines, structure declarations, assigning values, passing structures through ports-synthesis guidelines, packed and unpacked arrays, array of structures, unions and packed unions, dynamic & associative arrays, Case study on verification of memory.
- > System Verilog procedural blocks: System Verilog specialised procedural blocks, latched procedural blocks, sequential logic procedural blocks, synthesis guidelines, task and function enhancements, passing task/function arguments by name. System Verilog procedural statements for design verification. Enhanced for loops, do while loops, continue and break, unique if else and priority if else, modeling FSM with System Verilog, Case studies on complex FSM implementations
- > Object Oriented Programming for verification: OOP terminologies, local and global variables, scoping rules, System Verilog’s class data type-defining class objects, public Vs private, class methods-inheritance, single inheritance, data hiding, building an object oriented test bench, Case studies on OOP.
- > System Verilog assertions and interfaces: Assertions in System Verilog, assertion concepts, immediate and concurrent assertions, controlling assertion messages, case studies on assertion based verification, System Verilog interfaces, interface methods, verification with interfaces, Case study on ATM router interface.
- > System Verilog randomization: Introduction, verification strategy using VMM, constraint details, common randomization problems, random control, random generators, random device configuration, agent, scoreboard, checker, driver, monitor and other functional layers, building a complete verification environment, Case study
- > SystemVerilog functional coverage: Introduction, coverage types, functional coverage strategies, simple functional coverage example, cover group, coverage options, analyzing coverage data, measuring coverage statistics during simulation, Case study on functional coverage
- > Advanced verification techniques: Save verification cycles, bootstrapping the verification process, high-level modeling concepts, coverage directed generation, verification coverage, threads and mail boxes, program and clocking blocks, active and reactive regions, interprocess communication, advanced interfaces, Case study.
- > Tools Used: Synopsys and Cadence Tools, NCSIM, ModelSim, VCS
|
80Hrs |
Rs.12000.00 |
| 7.Reconfigurable Embedded Platforms with FPGA |
- > Introduction to modern embedded system design and SOC design: Definition and examples of Embedded digital systems with emphasis on communication and networking, SOC design for embedded systems, VLSI design issues for embedded systems – Power, Homogenous and Heterogeneous COREs, Instructions sets, and Addressing concepts for embedded processors – Example Xilinx, MicroBlaze and ARM Thumb instruction sets, Power PC and MicroBlaze register organization, Cache organization for MicroBlaze, interrupt controllers for Embedded processors – example of Power PC and ARM Interrupt controller, memory space for embedded processors like Power PC and MicroBlaze, Pipelines for modern embedded processors e.g. Power PC pipeline
- > Architectures of common embedded processors: How to pick the right embedded processor for the application example in network processing, Overview of ARM Architecture overview, ARM AHB/AIX overview for connect and buses, AHB, APB, bus protocols. Case study of architecture of a basic AHB/APB bus bridge
- > Bus architectures and protocols: Modern on chip interconnect for embedded processors, Need for on chip buses from power and throughput standpoint, Concept of OCP protocol, OCP sockets, Discussion of simple OCP socket design, OCP Core bridges, Case study of designing simple memory controller using OCP interface, Industry standard connect AMBA and its derivatives AXI bus protocol, Hierarchical AHB
- > Implementation of on chip buses: Overview of Element interconnect Bus in CELL processor and overview of concepts behind high performance buses on SOCs, Case study of an actual NOC implementation for a high end communication processor with low power implementation, various methods of bus arbitration and implementation of practical low-power bus arbiters on FPGA, Case study of implementation of DMA controller on FPGA
- > Implementation of communication and networking algorithms on FPGA systems: Dissecting communication algorithms for HW-SW co-design, Basic elements for executing communication algorithms in embedded Code, optimizing embedded systems through optimization of SW and HW, Case study of implementation of a Wireline MAC on an embedded processor on FPGA
- > Integration of Embedded processors on FPGAs: Integration of Xilinx MicroBlaze Core in FPGA. Key issues for CORE integration, Integration of a MicroBlaze core with an on chip bus. Address space optimization for system implementation, JTAG controller with IEEE 1149.1
- > Power-PC for communication applications: Example of integration of Power PC in Xilinx FPGA- Key issues for integration –like interfacing, power, memory addressing, interrupt handling, Case study of a communication system example- low cost router for integration of Power PC on FPGA- the design cycle
- > Xilinx MicroBlaze for networking applications: Anatomy of a network traffic management application, Ingress Queue and Egress queues, Queue depth, network traffic management, Use of MicroBlaze for managing traffic management, Packet flow control and its implementation on FPGA
- > Software tools for embedded processors on FPGAs: Overview of SW tools like compilers, linkers and loaders and methodologies to integrate COREs in FPGA- specific case of Xilinx Micro-Blaze, Case study of design flow and integration of a Xilinx 32 bit processor CORE on FPGA, usage of Xilinx EDK (Embedded Development Kit)
- > Future direction for embedded VLSI systems: Summary of current technology for embedded processors on FPGA, Future trends including issues of integrating multiple processor CORES on FPGA- case study
- > Tools Used: MATLAB/Simulink , Xilinx ISE, Xilinx uCos, Xilinx EDK
|
80Hrs |
Rs.12000.00 |
| 8.High Speed Systems and Interconnects |
- > Introduction to High Speed Board Design: PCB Design Environment, History of PCB, Challenges in Modern PCBs, Importance of Interconnect design, PCB Design Considerations, Major types of PCBs, Issues in high speed boards, PCB Design Process, High Speed Design Constraints
- > Fundamentals of High Speed Design : Frequency, Time and Distance, Lumped Versus Distributed Systems, Four Kinds of Reactance, Ordinary and Mutual Capacitance & Inductance
- > Printed Circuit Board Design: What is PCB, Parts of PCB, Various Chip packages, multilayer PCB, Inductive Coupling, Capacitive coupling, Steps in PCB Design, Physical design Issue.
- > Transmission Lines: Basic definitions, Electromagnetic Signal, Time and Frequency domain concepts, Transmission Lines, Lumped Vs Distributed Transmission Line, Microstrip & Stripline, Odd and Even Transmission Line, Reflection and Transmission Lines, Reflection calculations by mathematical analysis.
- > Crosstalk in High Speed Board: What is Crosstalk, Near-end and Far-end Crosstalk, Crosstalk Induced Noise, Effect of crosstalk on transmission line parameters, Termination technique to reduce crosstalk, Crosstalk Trends, Design Guidelines and Rules of Thumb
- > Signal Integrity: What is signal integrity, Effect of Signal Integrity on Transmission Line, Effect of Crosstalk, Termination, reflection and field solver, Analysis of Signal Integrity, Modeling and Simulation.
- > Routing of High Speed Signal: Main issues for routing, Routing topologies, Rise and fall time degradation, Signal Skew, Line Termination, Power distribution and de-coupling, PCB Stackup, Return Path Discontinuities, Ground/Power Bounce, Decoupling Caps.
- > Basics of Electro-Magnetic Compatibility (EMC) and Electrostatic Discharge (ESD): Introduction to EMC, Aspects of EMC, EMC and High Speed Design, Electro Magnetic Interference, Various Sources of EMI, Conducted Emissions and Susceptibility, Test and Measurement of EMI, EMC standards , Electro-static Discharge (ESD), ESD Sensitivity, ESD prevention, EMC Vs ESD.
- > High Speed Board Design for EMI/EMC Compliances: Definitions, Impact of EMI, EMC Fundamentals, Radiation and Conduction, Types of EMI, EMI characterization, Interference due to Signal Integrity, EMI Suppression, Bypassing & Decoupling, Grounding techniques & Trace Routing to protect Interference and ESD Protection.
- > PCB Materials & Fabrication Process: Materials used in FPCB, Direct Materials, Indirect Materials, Manufacturing Processes for a Multi-layer PCB, Inner Layer Processing Material Selection, Laminating and Imaging of Internal Layers, Etch Process, Remove Laminating Film, Completed Inner Layer Core, Layer stackup, Bonding Heat and Electro-plating and The designer and manufacturer interaction.
- > Tools Used: ORCAD, Allegro full suite
|
80Hrs |
Rs.12000.00 |
| 9.High Frequency Mixed Signal Circuits |
- > CMOS modeling and process characterization: Introduction to analog CMOS modelling and process characterization, RF modelling, equivalent circuit representation of MOS transistor, high frequency behavior of MOS transistor and AC small signal modeling, requirements for MOS modeling for RF application, modeling of intrinsic components, HF behavior, extrinsic components, non quasi static behavior, parameter extraction, RF measurements, NQS model for RF applications, noise source in MOS, physical mechanism of flicker and thermal noise models, HF noise parameters, analytical calculation of the noise parameters, induced gate noise and simulations, RF model, gate electrode and intrinsic input resistance model, substrate resistance model, junction diode models, I-V and capacitance model
- > Data converters: Introduction to data converters fundamentals, converting, analog signals to digital signals, sample and hold characteristics, DAC specifications, ADC specifications, data converter architectures, DAC architectures, resistor string DAC, R-2R ladder networks, current steering, charge scaling, cyclic DAC and pipeline DAC, ADC architectures, flash ADC, two step flash ADC, pipeline ADC, integrated ADC, successive approximation ADC and over sampling ADC Case study: Step wise design and analysis of delta sigma modulators and SAR ADC's
- > CMOS RF IC design principles: Introduction to CMOS RF IC design principles, standards RF wireless communications multi standard RF transceivers, RF front end architectures, frequency down conversion, image rejections, synthesis of a generic front end architectures, single and two path front end architectures, selection criteria, broad band poly phase filters and topology, RC polyphase and IF image reject filters, I/Q generators design consideration of image rejections, voltage gain RC filters, noise and voltage gain analysis in low IF front end voltage gain, noise factor, passive RF blocks, linearity analysis, RF building block specifications, and noise figure IIP3, Case study : RF wireless transceivers at 2.4 GHz
- > Circuit design for RF Transceivers: Introduction to RF transceivers, RF specifications, RF device technology, transmitter architectures like direct conversion transmitters, two step transmitters, receivers architectures like heterodyne receivers, homodyne receivers, image reject receivers, digital IF receivers and sub sampling receivers, Case studies: Motorola’s FM receivers: Modelling of building blocks
- > Low noise amplifiers and Mixers: Introduction to LNA and mixers, general consideration, input matching, biplolar LNA, CMOS LNA design, measurements, single transistor LNA, design steps, simulation and measurements, classical LNA. mixer specification, bipolar mixers, CMOS mixers, active mixers, passive mixers, 1/F noise in mixer transistor, IF amplifiers and switched capacitor behavior models, Case Study : Common source stage with resistive load LNA, Single and balanced mixers
- > RF power amplifiers and oscillators: Introduction to RF power amplifiers and oscillators, specification, efficiency, generic amplifier, heating, linearity and ruggedness, bipolar PA design, CMOS PA design, classifications of PA, types of PA's, linearization principles, predistrotion techniques, phase correcting feedback, envelope elimination restoration and Cartesian feedback, ideal and non ideal oscillators, oscillators condition and amplitude stabilization, frequency tuning and linearity, phase noise to carrier ration, power dissipation, spurious emission SNR degradation of FM signals, harmonics, I/Q Matching, LC and RC oscillators Case study : Class B power amplifier, An 830MHZ monolithic LC oscillators, an 10GHz I/Q RC oscillators with active inductors
- > Frequency Synthesizers : Introduction to Frequency Synthesizers, integer N PLL architectures, tuning system specifications, system level aspects of PLL building blocks, VCO, frequency dividers, phase- frequency detector/charge pump combination, loop filter, dimensioning the PLL parameter, spectral purity performance, phase noise performance, Case study: Linear Model PLL Analog CMOS filters for very high frequencies : Introduction to analog CMOS filters for very high frequencies, filter synthesis for high frequencies, cascaded, signal flow, state space, gyrator and coupled generated bandpass filters, effect of idealities, transconductance design, VHF transconductance, detail analysis and measurements, tuning, VCO tuning loop, quality factor, supply voltage unit, filter realizations, TV filters, IF filters, and third order elliptical filters, Case Study : Monolithic analog continuous time filters
- > Analog baseband architectures for low voltage wireless application: Introduction to baseband architectures for low voltage wireless application , low voltage analog based band techniques, system design of SIP receivers IEEE 802.11A/B/G WLAN, Case study :SIP receivers IEEE 802.11A/B/G WLAN
- > Practical design techniques for sensor signal conditioning: Introduction to design techniques for sensor signal conditioners, bridge circuits, strain, force, pressure and flow measurements, high impedance sensors, position and motion sensors, temperature sensor, ADC's for signal conditioning, smart sensors, and hardware techniques
- > Mixed Signal Testing : Introduction to mixed signal testing, DSP based and Model based analog and mixed signal test, delay test, analog test bus standard, oscillation-based built-in self-test (OBIST) techniques
- > Tools Used: MATLAB, HSPICE, Virtuso, SpectreRF, NanoSim, HSIM, ADS, Qualnet
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80Hrs |
Rs.12000.00 |
9. Undergraduate and Postgraduate Project Training
Undergraduate and postgraduate students can do their projects under Modular Training Programme (MTP) route
- > Fees for attending a module and learning the module/skills ( MTP module fee applicable)
- > For using lab facilities for working on his/her project as well as guidance
1. B.Tech Project : Rs.6000.00 / head for a duration of 3 months
2. M.Tech/ME Project : Rs.10000.00 / head for a duration of 5 months
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