VSD 405T - VLSI Physical Design & Verification  
 

Indicative contents

  • Need for Physical Design
  • Physical design flow
  • Introduction to Physical Design
  • Tools for physical design flow
  • Physical design requirements
  • Review of gate level netlist, timing analysis, synthesis, formal verification, DFT
  • Properties of design examples considered for physical design
  • Wireload models, stastical and event based analysis of interconnect delays, Elmore delay models
  • Use of scripting language for design automation
  • Creating design libraries and adding data
  • Detail design of Partitioning, FloorPlanning and PowerPlanning for both hierarchical and flatten netlist
  • Requirements for hierarchical design flow and flattened design flow
  • Floor planning requirements, use of IOBs, Macros
  • Constraints for floor planning
  • Low power design flow
  • Timing analysis and correction
  • Detail Design Placement and optimization
  • Clock Tree synthesis (CTS) and Clock tree optimization (CTO)
  • Designs with multiple clock domains
  • Routing and Post routing optimization
  • Design for Manufacturability (DFM)
  • Issues of Electron migration, SI, Cross Talk analysis
  • Physical Verification (DRC, LVS)
  • Parasitic extraction
  • Timing verification and timing signoff
  • Formal verification
  • Back annotation techniques
     

Module Resources

  • Essential reading
    1. Course notes
  • Recommended Reading
    1. Sadiq M. Sait and Habib Youssef, VLSI Physical Design Automation: Theory and Practice, IEEE Press.
    2. Sadiq M. Sait and H. Youssef, VLSI Physical Design Automation: Theory and Practice, World Scientific, 1999.
    3. M. Sarrafzadeh and C. K. Wong, An Introduction to VLSI Physical Design, McGraw Hill Publications, 1996.
    4. Digital Integrated Circuits: A Design Perspective (2nd Ed.), J. M. Rabaey, A. Chandrakasan, B. Nikolic (Prentice-Hall, 2003)
    5. Algorithms for VLSI Physical Design Automation, N. A. Sherwani (Kluwer Academic Publisher, 1993)
    6. Introduction to Algorithms (2nd Ed.), Cormen, Leiserson, Rivest, and Stein (MIT Press, 2001).
       
  • Software Tools / Hardware: Astro, Physical Compiler, Hercules, Jupiter, St-RCXT, Prime Time, Soc_encounter, Assura DRC, and Assura LVS