Indicative contents

• Digital Logic Design:
  1. Introduction to Digital circuits
  2. Design of combinational, sequential circuits
  3. Realization of digital circuits
  4. Timing aspects in Combinational Circuits
  5. Timing issues in Sequential Circuits
  6. PLA, Shift registers and Counters, Multipliers, Booths multiplier
  7. Synchronous sequential circuits, Mealy & Moore machines, finite state machine design, state minimization.
  8. Design Examples and Case Studies
• Verilog Hardware Description Language
  1. Introduction to Verilog HDL, Basic conventions of Language, Verilog Data Types & Operators.
  2. Levels of modeling, Data flow modeling, Gate level modeling, Behavioral modeling, Continuous and Procedural Assignments, Conditional statements, Blocking & Non-blocking Assignments.
  3. Verilog Test-bench, Tasks and Functions, System Tasks and Compiler Directives
  4. Finite State Machines & Switch level modeling.
  5. Logic Synthesis with Verilog HDL, Coding Guidelines, Synthesis Issues
  6. Verilog for Verification
• Field Programmable Gate Arrays:
  1. Introduction to Programmable Logic devices & FPGAs, and Programming Technologies.
  2. Introduction to FPGA Architectures :Introduction to Xilinx devices, SPARTAN IIE and Virtex devices.
  3. Xilinx Design Flow and Implementation
  4. Architecture Wizard and PACE
  5. Global Timing Constraints
  6. Synthesis Techniques
   

Module Resources

• Essential reading
  1. Course notes
• Recommended Reading
  1. D.Brown, Francis, Rose, and Vranesic, Field –Programmable Gate arrays, 2nd Edition, Kluwer Academic Publications, 1995.
  2. Stephen Brown and Zvonko Vranesic, “Fundamentals of Digital Logic with Verilog Design”,TATA McGRAW Hill Edition
  3. Wayne Wolf, Modern VLSI design system on silicon, Second edition, Pearson Education, 2001
  4. Samir Palnitkar, Verilog HDL, Pearson Education, 2001.
  5. Jayaram Bhasker, Verilog Primer, Third Edition, Pearson Education Asia, 2001
  6. Douglas J Smith, HDL Chip Design, Doone Publications