Indicative contents

Exercise on the following topics should be designed, modeled, verified using Modelsim/NCSim and implemented on FPGAs using FPGA implementation tools:

1. Binary to Gray converter.
2. 2N:N Priority encoder.
3. Universal N bit shift register with shift left & right and rotate left & right.
4. Parity Checker and generator.
5. Gray Counter.
6. UDP for a JK Flip-Flop.
7. Task, which receives binary word and returns the number of one’s in the word.
8. To find the factorial of a number.
9. To compute XY.
10. N -bit adder-subtractor circuit.
11. N-bit Arithmetic logic unit.
12. N-bit parallel in serial out.
13. N-bit asynchronous counter with loadable input.
14. BCD to Seven Segment display.
15. N-bit up/down synchronous counter with count enable and loadable input.
16. Johnson Counter.
17. m X n Memory with read/write enable and Empty/Full flags..
18. Design a FSM for a sequence detector, which accepts serial data and detects a pattern, which is supplied by another parallel input.
19. Xilinx Tool Flow
20. Architecture Wizard and PACE
21. Global Timing Constraints
22. Implementation Options
23. CORE Generator Software System
24. Designing Clock Resources
25. Synthesis Techniques
26. Review of Global Timing Constraints

Module Resources

• Books
  1. D.Brown, Francis, Rose, and Vranesic, Field –Programmable Gate arrays, 2nd Edition, Kluwer Academic Publications, 1995.
  2. Stephen Brown and Zvonko Vranesic, “Fundamentals of Digital Logic with Verilog Design”,TATA McGRAW Hill Edition
  3. Wayne Wolf, Modern VLSI design system on silicon, Second edition, Pearson Education, 2001
  4. Samir Palnitkar, Verilog HDL, Pearson Education, 2001.
  5. Jayaram Bhasker, Verilog Primer, Third Edition, Pearson Education Asia, 2001
  6. Douglas J Smith, HDL Chip Design ,Doone Publications
      
• Laboratory

Software Tools / Hardware : Model Sim , NCSim from cadence, Xilinx ISE, Xilinx FPGA Development Boards (Spartan II & IIE, III and Vertex II Pro) Altera FPGA Boards, ACTEl Boards
Lab Manuals : ModelSim/NCSim MSRSAS Manual, Xilinx ISE MSRSAS Manual